SEGA SATURN DEVELOPER'S MANUAL

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Timer register

SCSP has an 8-bit up-count timer with three prescalers: timers A, B, and C. The prescaler execution time can be set for each timer with "TACTL", "TBCTL", and "TCCTL".

TACTL [2: 0] (W); Timer-A ConTroL

Specify the timer A increment cycle.

Table 4.33 Timer A increment period

TACTL Increment period
0 Once per sample
1 Once every two samples
2 Once every 4 samples
3 Once every 8 samples
4 Once every 16 samples
5 Once every 32 samples
6 Once every 64 samples
7 Once every 128 samples

TBCTL [2: 0] (W); Timer-B ConTroL

Specify the increment cycle of timer B.

Table 4.34 Timer B increment period

TBCTL Increment period
0 Once per sample
1 Once every two samples
2 Once every 4 samples
3 Once every 8 samples
4 Once every 16 samples
5 Once every 32 samples
6 Once every 64 samples
7 Once every 128 samples

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TACTL	Increment period
0	Once per sample
1	Once every two samples
2	Once every 4 samples
3	Once every 8 samples
4	Once every 16 samples
5	Once every 32 samples
6	Once every 64 samples
7	Once every 128 samples

TBCTL	Increment period
0	Once per sample
1	Once every two samples
2	Once every 4 samples
3	Once every 8 samples
4	Once every 16 samples
5	Once every 32 samples
6	Once every 64 samples
7	Once every 128 samples