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Chapter 3 Register details

■ 3.1 Register list

Table 3.1 shows the list of SCU registers. The following is a detailed description of the registers, divided into items for each register generic term.

Table 3.1 Register list
 Register generic 
 Register name 
 Start address 
 Last address 
 Size 
 DMA control register 
 Level 0-DMA set register 
25FE0000 H
25FE0017 H
24 byte
 Level 1-DMA set register 
 25FE0020 H 
 25FE0037 H
24 byte
 Level 2-DMA set register 
 25FE0040 H 
 25FE0057 H
24 byte
 DMA forced stop register 
 25FE0060 H 
 25FE0063 H 
4 byte
 DMA status register 
 25FE007C H 
 25FE007F H 
4 byte
 DSP control port 
 DSP program control port 
25FE0080 H
25FE0083 H
4 byte
 DSP program RAM data port 
 25FE0084 H 
 25FE0087 H 
4 byte
 DSP data RAM address port 
 25FE0088 H 
 25FE008B H 
4 byte
 DSP data RAM data port 
 25FE008C H 
 25FE008F H 
4 byte
 Timer register 
 Timer 0 compare register 
 25FE0090 H
25FE0093 H
4 byte
 Timer 1 set data register 
 25FE0094 H 
 25FE0097 H 
4 byte
 Timer 1 Mode Register 
 25FE0098 H 
 25FE009B H 
4 byte
 Interrupt Control Register 
 Interrupt Mask Register 
 25FE00A0 H
25FE00A3 H
4 byte
 Interrupt status register 
 25FE00A4 H 
 25FE00A7 H 
4 byte
 A-Bus control register 
 A-Bus interrupt acknowledge 
25FE00A8 H
25FE00AB H
4 byte
 A-Bus setting register 
 25FE00B0 H 
 25FE00B7 H 
8 byte
 A-Bus refresh register 
 25FE00B8 H 
 25FE00BB H 
4 byte
 SCU control register 
 SCU SDRAM selection register 
25FE00C4 H
25FE00C7 H
4 byte
 SCU version register 
 25FE00C8 H 
 25FE00CB H 
4 byte


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