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Read address addition value (1 [bit 8] in Figure 3.5)
DxRA [x = 2-0] (W) DMA level 2-0 Read address Addition data bit
Specify the number of additional bytes for the read address. Table 3.2 shows the read address addition value. This is only valid for the A-Bus CS2 space, otherwise set 1B. When the DMA is operating, the register at that level is write-protected.

Table 3.2 Read address addition value 
 DxRA (x = 2−0) 
 contents 
 0 
 Do not add. 
 1 
 Add 4 bytes.

Write address addition value (2 to 4 [bit 2 to 0] in Figure 3.5)
DxWA3-0 [x = 2-0] (W) DMA level 2-0 Write address Addition data bit3-0
Specify the number of additional bytes for the write address. Table 3.3 shows the write address addition value. This is all valid when writing to B-Bus, and only 000B or 010B of data can be set when writing to the CS2 space of A-Bus. When writing to other than A-Bus or B-Bus, set the data to 010B. When the DMA is operating, the register at that level is write-protected.

Table 3.3 Write address addition value 
 DxWA (x = 2-0) 
 contents 
 000B 
 Do not add 
 001B 
 Add 2 bytes 
 010B 
 Add 4 bytes 
 011B 
 Add 8 bytes 
 100B 
 Add 16 bytes 
 101B 
 Add 32 bytes 
 110B 
 Add 64 bytes 
 111B 
 Add 128 bytes

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