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Figure 3.8 Specifying the export address addition value

DMA enable register

Register that allows DMA execution. When the DMA is operating, the register at that level is write-protected. Figure 3.9 shows the format of this register.

Figure 3.9 Level 2-0 DMA enable bits (registers: D0EN, D1EN, D2EN) Initial value 00000000H

DMA permission bit (1 [bit 8] in Figure 3.9)
DxEN [x = 2-0] (W) DMA level 2-0 ENable bit
This bit allows DMA execution. Set this flag to 1 to enable DMA. After this, DMA can be started, so set other necessary data in advance.

DMA start bit (2 [bit 0] in Figure 3.9)
DxGO [x = 2-0] (W) DMA level 2-0 GO bit
This bit starts DMA execution. This bit is valid only when the activation factor bit is 111B. Set this bit to 1 when starting DMA. One set activates DMA once.

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