SEGA SATURN DEVELOPER'S MANUAL


DSP end interrupt status bit (25 [bit 5] in Figure 3.22)
IST5 (R / W) Interrupt STatus bit bit5: Indicates the status of the DSP end interrupt.
Timer-1 interrupt status bit (26 [bit 4] in Figure 3.22)
IST4 (R / W) Interrupt STatus bit bit4: Indicates the status of timer-1 interrupt.
Timer-0 interrupt status bit (27 [bit 3] in Figure 3.22)
IST3 (R / W) Interrupt STatus bit bit3: Indicates the status of timer-0 interrupt.
H-blank-IN interrupt status bit (28 [bit 2] in Figure 3.22)
IST2 (R / W) Interrupt STatus bit bit2: Indicates the H-blank-IN interrupt status. .
V-blank-OUT interrupt status bit (29 [bit 1] in Figure 3.22)
IST1 (R / W) Interrupt STatus bit bit1: Indicates the V-blank-OUT interrupt status.
V-Blank-IN interrupt status bit (30 [bit 0] in Figure 3.22)
IST0 (R / W) Interrupt STatus bit bit0: Indicates the V-blank-IN interrupt status.