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Table 3.10 CS0 space burst cycle setting values ​​ 
 0  
 0  
 0  
 1  
 bits 
 Number of waits 
A0BW3
A0BW2
A0BW1
A0BW0
0
0
0
 
 Do not wait (do not sample weight) 
0
0
0
 
 1 cycle wait 
: 
: 
: 
: 
 
1
1
1
 
 14 cycle wait 
1
1
1
 
 15 cycle wait

Normal cycle wait number setting bits in CS0 space (9 to 12 [bit 23 to 20] in Figure 3.24)
A0NW3-0 (W) A-Bus CS0 Normal cycle Wait bit3-0
Set the number of waits for one cycle when performing normal access in CS0 space. Table 3.11 shows the setting values.

Table 3.11 CS0 space normal cycle setting value 
 0  
 0  
 0  
 1  
 bits 
 Number of waits 
A0NW3
A0NW2
A0NW1
A0NW0
0
0
0
 
 Do not wait (do not sample weight) 
0
0
0
 
 1 cycle wait 
: 
: 
: 
: 
 
1
1
1
 
 14 cycle wait 
1
1
1
 
 15 cycle wait

Burst length setting bits for CS0 space (13 to 14 [bits 19 to 18] in Figure 3.24)
A0LN1-0 (W) A-Bus CS0 burst LeNgth bit1-0
Specify the access length (boundary) for burst access in CS0 space. Table 3.12 shows the length setting values.

Table 3.13 CS0 space burst length setting value 
 bit 
 access setting value 
A0LN1
A0LN0
 0 
 0 
 No burst access 
 0 
 1 
 4-address burst access 
 1 
 0 
 256 address burst access 
 1 
 1 
 No border

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