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Table 3.20 Reserve space burst cycle setting values ​​ 
 0  
 0  
 0  
 1  
 bits 
 Number of waits 
A3BW3
A3BW2
A3BW1
A3BW0
0
0
0
 
 Do not wait (do not sample weight) 
0
0
0
 
 1 cycle wait 
: 
: 
: 
: 
 
1
1
1
 
 14 cycle wait 
1
1
1
 
 15 cycle wait

Normal space wait number setting bits for spare space (16 to 19 [bit 7 to 4] in Figure 3.25)
A3NW3-0 (W) A-Bus CS3 Normal cycle Wait bit3-0
Sets the number of waits for one cycle when performing normal access in the spare space. Table 3.21 shows the setting values.

Table 3.21 Reserve space normal cycle setting values ​​ 
 0  
 0  
 0  
 1  
 bits 
 Number of waits 
A3NW3
A3NW2
A3NW1
A3NW0
0
0
0
 
 Do not wait (do not sample weight) 
0
0
0
 
 1 cycle wait 
: 
: 
: 
: 
 
1
1
1
 
 14 cycle wait 
1
1
1
 
 15 cycle wait

Burst length setting bit for spare space (20 to 21 [bit 3 to 2] in Figure 3.25)
A3LN1-0 (W) A-Bus CS3 burst LeNgth bit1-0
Specify the length (boundary) to access when performing burst access in the spare space. Table 3.22 shows the length setting values.

Table 3.22 Reserve space burst length setting values ​​ 
 bit 
 access setting value 
A3LN1
A3LN0
 0 
 0 
 No burst access 
 0 
 1 
 4-address burst access 
 1 
 0 
 256 address burst access 
 1 
 1 
 No border

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