Table 4.1 Instruction List (1)
Type | Order | Outline | |
Operation instruction | ALU control | NOP | Do nothing. |
AND | ANDs [ACL] and [PL]. | ||
OR | OR with [ACL] and [PL]. | ||
XOR | Exclusive OR of [ACL] and [PL]. | ||
ADD | Add [ACL] and [PL]. | ||
SUB | Subtract [PL] from [ACL]. | ||
AD2 | Add [ACH] [ACL] and [PH] [PL]. | ||
SR | Shift [ACL] one bit to the right and store the LSB in the carry flag. | ||
RR | [ACL] is rotated 1 bit to the right and the LSB is stored in the carry flag. | ||
SL | Shift [ACL] one bit to the left, 0 into [ACL] LSB, MSB carry flag Store in | ||
RL | Rotate [ACL] one bit to the left and store the MSB in the carry flag. | ||
RL8 | Rotate [ACL] 8 bits to the left, and store b24 in the carry flag. | ||
X-Bus control | NOP | what If not. | |
MOV [s], X | Transfer data from data RAM to [RX]. | ||
MOV MUL, P | Transfer the data of [MULTIPLIER] to [PH] [PL]. | ||
MOV [s], P | Transfer data from data RAM to [PL]. | ||
Y-Bus control | NOP | what If not. | |
MOV [s], Y | Transfer data from data RAM to [RY]. | ||
CLR A | Clear [ACH] and [ACL] to 0. | ||
MOV ALU, A | Transfer the data of [ALU] to [ACH] [ACL]. | ||
MOV [s], A | Transfer data from data RAM to [ACL]. | ||
D1-Bus control | NOP | what If not. | |
MOV SImm, [d] | Data RAM specified by [d] or SImm (short immediate) data Store in the | ||
MOV [s], [d] | [d] from the data RAM or register specified by [s] The specified data RAM or | ||
Load | MVI Imm, [d] | Stores the data of Imm (immediate) | |
MVI Imm, [d], Z | Imm only when the Z (zero flag) of the program control port is 1 (Immediate) | ||
MVI Imm, [d], NZ | Imm only when the Z (zero flag) of the program control port is 0 (Immediate) |
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