CRMD1 | CRMD0 | Mode | Processing | ||||||||
0 | 0 | 0 | |||||||||
0 | 1 | 1 | |||||||||
1 | 0 | 2 | |||||||||
1 | 1 | − |
Storing color data in the color RAM must be done after setting this bit.
When mode 0 is set, writing the data to the first half of the color RAM address will simultaneously write the same data as the first half to the second half.
* When the CRKTE bit is set to 1, set the color RAM mode to mode 1. At that time, the second half of the color RAM (100800H to 100FFFH) is used for coefficient table data, so color data cannot be stored.