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Chapter 4 Scroll screen

4.1 Screen display control

The scroll screen can be specified for each screen that is not displayed by controlling the VRAM access for display. You can also specify for each screen whether or not to disable the dot color code (transparent code), which is a transparent dot on the screen to be displayed.

Screen display enable register

Screen display enable register controls screen display and transparency code. This is a write-only 16-bit register located at 180020H. The value is cleared to 0 after power-on or reset, so be sure to set it.

Transparent enable bit : Transparent enable bit (N0TPON0, N1TPON, N2TPON, N3TPON, R0TPON)
Specify whether to disable the transparent code. For transparent codes, please refer to “ Transparent Dots ” in “ 4.3 Cell ”. 

N0TPON
180020H
 bit 8 
 for NBG0 (or RBG1) 
 N1TPON 
 180020H 
 bit 9 
 NBG1 (or EXBG) 
 N2TPON 
 180020H 
 bit 10 
 NBG2 
 N3TPON 
 180020H 
 bit 11 
 NBG3 
 R0TPON 
 180020H 
 bit 12 
 for RBG0 

 xxTPON 
 Processing 
 0 
 Enable transparency code (transparent code dots will be transparent) 
 1 
 Disable transparency code (transparent code dots are displayed according to their data values)
[Note] N0, N1, N2, N3, or R0 is entered in the bit name xx.

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