N0ON | 180020H | bit 0 | NBG0 |
N1ON | 180020H | bit 1 | NBG1 |
N2ON | 180020H | bit 2 | NBG2 |
N3ON | 180020H | bit 3 | NBG3 |
R0ON | 180020H | bit 4 | for RBG0 |
R1ON | 180020H | bit 5 | for RBG1 |
xxON | Processing |
0 | Cannot display (does not access VRAM for display) |
1 | Can view |
∙ When an access command for a screen with this bit set to 0 is set in the VRAM cycle pattern register, the access command is ignored and VRAM access for displaying the screen is not performed.
* Do not set R1ON to 1 when R0ON is 0.
* When both R0ON and R1ON are set to 1, the normal scroll screen cannot be displayed. At this time, VRAM-B0 is fixed to RBG1 character pattern table RAM, and VRAM-B1 is fixed to RBG1 pattern name table RAM.
If a specific screen cannot be displayed due to register settings, set the bit of that screen to 0. For example, if both R0ON and R1ON are set to 1, set the N0ON, N1ON, N2ON, and N3ON bits to 0.
Please refer to “ 6.2 Rotation scroll screen display control ” for the rotation scroll screen.