N0ZMXI2 to N0ZMXI0	180078H	Bits 2 to 0	NBG0 For horizontal direction (integer part)
N0ZMXD1 to N0ZMXD8	18007AH	bits 15 to 8	NBG0 for horizontal direction (decimal part)
N0ZMYI2 to N0ZMYI0	18007CH	bits 2 to 0	NBG0 for vertical direction (integer part)
N0ZMYD1 to N0ZMYD8	18007EH	bits 15 to 8	NBG0 for vertical direction (decimal part)
N1ZMXI2 to N1ZMXI0	180088H	bits 2 to 0	NBG1 horizontal direction (integer part)
N1ZMXD1 to N1ZMXD8	18008AH	bits 15 to 8	NBG1 horizontal direction (decimal part)
N1ZMYI2 to N1ZMYI0	18008CH	bits 2 to 0	NBG1 for vertical direction (integer part)
N1ZMYD1 to N1ZMYD8	18008EH	bits 15 to 8	NBG1 for vertical direction (fractional part)

∙ Set the coordinate increment to a value smaller than 1 for enlarged display, and the coordinate increment to a value greater than 1 for reduced display. When the coordinate increment is 1, it is displayed normally. Use a positive value for all specifications. NBG2 and NBG3 coordinate increments are fixed at 1.
座標 By changing the value during the horizontal blanking period, the coordinate increment value can be changed from the middle of the screen.
縮小 To enable horizontal reduction display, it is necessary to set the reduction enable register. Do not set the horizontal coordinate increment to a value outside the setting range determined by the setting of the reduction enable bit. Table 5.1 shows the horizontal coordinate increment and reduction settings.

Table 5.1 Horizontal coordinate increment and reduction settings

Horizontal reduced display setting	Horizontal coordinate increment setting range
Not possible	0 ≦ (Horizontal coordinate increment) ≦ 1
Up to 1/2 possible	0 ≦ (Horizontal coordinate increment) ≦ 2
Available up to 1/4	0≤ (Horizontal coordinate increment) ≤4