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Line scroll table address register

Line scroll table address register specifies the start address of the line scroll table. This is a write-only 32-bit register located at addresses 1800A0H to 1800A6H. The value is cleared to 0 after power-on or reset, so be sure to set it.

Line scroll table address bit : Line scroll table address bit

(N0LSTA18 to N0LSTA16, N0LSTA15 to N0LSTA1, N1LSTA18 to N1LSTA16, N1LSTA15 to N1LSTA1)
Specify the top address of the line scroll table on VRAM.

N0LSTA18 to N0LSTA16 1800A0H Bits 2 to 0 NBG0 For (upper bit)
N0LSTA15 to N0LSTA1 1800A2H bits 15 to 1 For NBG0 (lower bits)
N1LSTA18 to N1LSTA16 1800A4H bits 2 to 0 NBG1 (upper bit)
N1LSTA15 to N1LSTA1 1800A6H bits 15 to 1 NBG1 (lower bits)

The actual start VRAM address is calculated by the following formula. If the VRAM capacity is 4M bits, the most significant bit of the address is ignored. 

 (Line scroll table start address) = (Line scroll table address register value 18 bits) × 4H

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