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Color RAM mode bits : Color RAM mode bits (CRMD1, CRMD0), bits 13, 12
Please refer to “ 3.4 Color RAM mode ”.
* When the CRKTE bit is set to 1, set the color RAM mode to mode 1. At that time, the second half of the color RAM (100800H to 100FFFH) is used for coefficient table data, so color data cannot be stored.

VRAM mode bit : VRAM mode bit (VRAMD, VRBMD), bits 9, 8
Please refer to “ 3.2 VRAM bank division ”.

Rotation data bank specification bit : Data bank select bit
(RDBSA01, RDBSA00, RDBSA11, RDBSA10, RDBSB01, RDBSB00, RDBSB11, RDBSB10), bits 7-0
Please refer to “ 6.2 Rotating scroll screen display control ”.
When the CRKTE bit is set to 1, do not specify that the 4 banks of VRAM are used as coefficient table data RAM.

■ Coefficient table control register

Coefficient table control register controls the coefficient table. This is a write-only 16-bit register located at 1800B4H. The value is cleared to 0 after power-on or reset, so be sure to set it.

Coefficient line color enable bit : Coefficient line color enable bit (RAKLCE, RBKLCE)

Specify whether to use line color screen data in the coefficient data.

RAKLCE 1800B4H Bit 4 For rotation parameter A
RBKLCE 1800B4H Bit 12 For rotation parameter B

∙ This bit is valid only when the corresponding coefficient table is used and the data size is 2 words.

RxKLCE Process
0 Do not use line color screen data in coefficient data
1 Use line color screen data in coefficient data
[Note] A or B is entered in the bit name x.

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