W0SX9 to W0SX0	1800C0H	Bits 9 to 0	W0 For start point coordinates
W0EX9 to W0EX0	1800C4H	Bits 9 to 0	For W0 end point coordinates
W1SX9 to W1SX0	1800C8H	Bits 9 to 0	For W1 start point coordinates
W1EX9 to W1EX0	1800CCH	Bits 9 to 0	For W1 end point coordinates

The register bit configuration varies depending on the graphic mode setting. For normal graphics, the least significant bit is invalid data. In the case of dedicated normal graphics, the most significant bit becomes invalid data. In the case of dedicated high-resolution graphics, the most significant bit is invalid data, and since there is no bit for H0, the value is in units of 2 pixels.
∙ Table 8.1 shows the bit contents of the window position register depending on the graphic mode setting.

Table 8.1 Bit contents of horizontal position window position register

Graphic Mode	WxxX9	WxxX8	WxxX7	WxxX6	WxxX5	WxxX4	WxxX3	WxxX2	WxxX1	WxxX0
Normal	H8	H7	H6	H5	H4	H3	H2	H1	H0	Disabled
High Resolution	H9	H8	H7	H6	H5	H4	H3	H2	H1	H0
Dedicated Normal	Disable	H8	H7	H6	H5	H4	H3	H2	H1	H0
Dedicated High Resolution	Disable	H9	H8	H7	H6	H5	H4	H3	H2	H1

[Note] The bit name xx contains 0S, 0E, 1S, or 1E.

W0SY8 ~ W0SY0	1800C2H	bits 8-0	For W0 start point coordinates
W0EY8 to W0EY0	1800C6H	bits 8 to 0	For W0 end point coordinates
W1SY8 to W1SY0	1800CAH	bits 8 to 0	For W1 start point coordinates
W1EY8 to W1EY0	1800CEH	bits 8 to 0	For W1 end point coordinates

The register bit configuration changes depending on the screen mode setting. For single density interlace in normal and high resolution modes, even field