Chapter 5 Operation of DSP in SCSP

■5.1 DSP configuration

Figure 5.1 shows the DSP configuration diagram.

Figure 5.1 DSP configuration diagram

■5.2 RAM in DSP

EXTS[15:0](R)；EXTernal Stack

Represents the data buffer for digital audio input.

MIXS[19:0](R/W); MIX Stack

Represents a sound data buffer from an input mixer.

MEMS[23:0](R/W);MEMory Stack

Represents the input data buffer from sound memory.

TEMP[23:0](R/W);TEMPorary register

Represents the DSP work buffer (128 words). The DSP work buffer has a ring buffer configuration, and the pointer decreases by 1 for each sample.

COEF[12:0](R/W); COEFficient register

Represents a buffer of DSP coefficients.

MADRS[16:1](R/W);Memory ADdReSs register

Represents a buffer of DSP addresses.

MPRO[63:0](R/W); Micro PROgram register

Represents the DSP microphone program buffer.

EFREG[15:0](R/W);EFfect REGister

Represents the DSP output buffer.