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SCU User's Manual Chapter 4 DSP control
■4.1 DSP internal block diagram
- Figure 4.1 shows the internal block diagram of the DSP.
- Figure 4.1 DSP internal block diagram
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- ●ALU
- This is an arithmetic unit that can output up to 48 bits. Normal calculations are executed in 32 bits. Only the product-sum operation is a 48-bit operation.
- ●MULTIPLIER
- This is a multiplier that obtains a 64-bit result using 32 bits x 32 bits, and outputs the lower 48 bits. The calculation result is 48 bits of data, the upper 16 bits are stored in PH (see below) and the lower 32 bits are stored in PL (see below).
- ●TOP(W)
- This is an 8-bit register that stores the start address. For JUMP instructions, subroutine execution, etc., the start address is stored in this register and the process is executed.
- ●LOP(W)
- This is a 12-bit register that stores the loop counter. Set the number of loops in the process of repeatedly executing one instruction.
- ●CT0-3(W)
- This is a 6-bit register that stores the access address of data RAM0-3.
- ●MD0-3(R/W)
- This is a 32-bit data port that stores data in data RAM0-3. Each data RAM has 64 data ports.
- ●RA(W)
- This is an address storage register for accessing data RAM. This register is 8bit. The upper 2 bits store the RAM specification number (0-3), and the lower 6 bits store the RAM access address.
- ●RX(W)
- This is a 32-bit X bus connection register that stores multiplier input data.
- ●RY(W)
- This is a 32-bit Y bus connection register that stores multiplier input data.
- ●PH(W)
- This register stores the upper 16 bits of the 48-bit multiplier output data. It is also an input data storage register that stores the upper 16 bits of input data B (48 bits) of the ALU arithmetic unit.
- ●PL(W)
- This register stores the lower 32 bits of the 48-bit multiplier output data. It is also an input data storage register that stores the lower 32 bits of the input data B (48 bits) of the ALU arithmetic unit.
- ●ACH(W)
- This register stores the upper 16 bits of the 48 bit data representing the ALU operation results. It is also an input data storage register that stores the upper 16 bits of the input data A (48 bits) of the ALU arithmetic unit.
- ●ACL(W)
- This register stores the lower 32 bits of the 48 bit data representing the ALU operation results. It is also an input data storage register that stores the lower 32 bits of the input data A (48 bits) of the ALU arithmetic unit.
- ●D0 bus
- A 32-bit data bus for external access. Operates at 28MHz. Used for accessing the main CPU.
- ●X bus, Y bus
- This is a 32-bit data bus for obtaining computing unit input data. Operates at 14MHz.
- ●RA0(W)
- This is a 32-bit external address register used for external → DSP DMA transfer. Since the value is in 4-byte units, please set the external address by shifting it to the right by 2 bits.
- ●WA0(W)
- This is a 32-bit external address register used for DSP → external DMA transfer. Since the value is in 4-byte units, please set the external address by shifting it to the right by 2 bits.
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★ HARDWARE Manual ★ SCU User's Manual
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