■4.3 Operand execution method

The DSP actually controls and executes the registers in this way for the following instructions.

◆Execution of JUMP instruction

This is achieved by storing the jump destination address (Immediate Data) in the program RAM address of the program control port. However, please note that prefetched instructions will be executed. A conditional JUMP instruction first checks the state of the flag on the program control port, and if the condition is met, stores the jump destination address in the program RAM address of the program control port. For the format of the instruction, refer to the JUMP instruction part in Section 4.5 "Instructions". Figure 4.2 shows the JUMP instruction execution flow.

Figure 4.2 Executing the JUMP instruction

◆Executing the LOOP program

The program between the address specified by the top address register ([TOP]) and the DSP BTM instruction (see Section 4.5 "Instructions", LOOP BOTTOM instruction) is repeated the number of times specified by the loop counter ([LOP]). It will be executed. Therefore, in order to implement this process, set values in the top address register and loop counter in advance before executing it. Values can be set using the DSP's Load immediate instruction (see Section 4.5 "Instructions", Load immediate instruction). Figure 4.3 shows the execution flow of the LOOP program.

Figure 4.3 Executing the LOOP program

◆Execution of DMA instructions

This section explains the process of setting the DMA controller registers from the DSP and actually performing DMA transfer. DMA instructions are divided into the following two types depending on the transfer direction (read/write).

1. Data transfer from D0 bus to DSP
2. Data transfer from DSP to D0 bus

●Data transfer from D0 bus to DSP

The DSP data RAM transfer start address and external memory transfer start address are set in the registers ([CT0-3] and [RA0]), and the transfer is started by the DMA instruction. The instruction format up to the DMA instruction is as follows.
For details, see Section 4.5 " Instruction Details ".

MOV SImm,[CT0]     ; DSP data RAM0 transfer start address set
MVI Imm,[RA0]      ; External memory transfer start address set
DMA D0,[MD0],SImm  ; Start DMA transfer using D0 bus

Table 4.6 summarizes the characteristics of this DMA transfer. DMA transfer is executed in longword units, so set the number of transfer words (SImm of the DMA instruction above) in longword units.

Table 4.1 Characteristics of data transfer from D0 bus to DSP

Item	Features
set of flags	The program control port TO flag is set.
Startup and termination	Follows external data ready signal. With this signal, in units of 1 longword be transferred. Also, the DMA transfer is terminated by an external end signal, and this timing The TO flag of the program control port is reset when
Address update	Every time one longword is transferred, the DSP data RAM transfer address ([CTO-3]) is incremented by one. The external memory transfer address ([RA0]) is added according to the address addition number. Ru.
Hold state	Setting the Hold bit of a DMA instruction (see Section 4.5 “Instructions” DMA instruction section) to 1 causes The number of transfer words ([TN0]) and external memory transfer address ([RA0]) retain their values at the start of transfer. held.

●Data transfer from DSP to D0 bus

The DSP data RAM transfer start address and external memory transfer start address are set in the registers ([CT0-3] and [WA0]), and the transfer is started by the DMA instruction. The instruction format up to the DMA instruction is as follows. For details, see Section 4.5 " Instruction Details ".

MOV SImm,[CT0]     ; DSP data RAM0 transfer start address set
MVI Imm,[WA0]      ; External memory transfer start address set
DMA [MD0],D0,SImm  ; Start DMA transfer using D0 bus

Table 4.7 summarizes the characteristics of this DMA transfer. DMA transfer is executed in longword units, so set the number of transfer words (SImm of the DMA instruction above) in longword units.

Table 4.2 Characteristics of data transfer from DSP to D0 bus

Item	Features
set of flags	The program control port TO flag is set.
Startup and termination	Follows external data ready signal. With this signal, in units of 1 longword be transferred. Also, the DMA transfer is terminated by an external end signal, and this timing The TO flag of the program control port is reset when
Address update	Every time one longword is transferred, the DSP data RAM transfer address ([CTO-3]) is incremented by one. The external memory transfer address ([WAO]) is added according to the number of address additions. Ru.
Hold state	Setting the Hold bit of a DMA instruction (see Section 4.5 “Instructions” DMA instruction section) to 1 causes The number of transfer words ([TN0]) and external memory transfer address ([WA0]) retain their values at the start of transfer. held.

◆Execution of END command

When the END instruction is recognized, addition processing of the program RAM address of the program control port is stopped and the program execution control bit (EX flag) is reset. This will stop the DSP's program execution. However, data transfer using the DMA instruction continues to be executed until the transfer is completed, regardless of this END instruction. When the program stops, the program address value will stop at the address following the address where the END instruction is stored.