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SOUND ManualSCSP/DSP Assembler User's Manual
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SCSP/DSP Assembler User's Manual

6.dAsms Programming Guide


■Programming overview

When coding the dAsms source code, there is no need to be aware of pipeline processing, and all commands can be written with a sequential processing mindset. in particular,

  1. Preparing data required for calculation ( LDI / LDY / LDA )
  2. Description of multiplication-addition expression ( @... )
  3. Specifying the store destination (> )

Consider the procedure as one unit process, extract an appropriate partial function from the signal flow diagram, apply it to this unit process, and write partial source code. We will write the source code by repeating this in the processing order.

Below, we will explain how to code a DSP program in dAsms using a relatively simple example.

In the example program below, external expansion inputs EXTS00 and EXTS01, which can input CD Audio, etc., are used as Lch and Rch inputs, respectively, and the results of delay (echo) processing performed on Lch and Rch independently are output to EFREG00 and EFREG01, respectively. That is.

■Signal flow diagram

■Coding procedure

1. Definition of coefficient symbol (#COEF)

1-1 Definition of coefficients related to level attenuation

As a coefficient related to level attenuation,

Send level to delay :EffSendLevelL/R
Direct signal level :DrctLevelL/R
Return level from delay :EffRtnLevelL/R
Delay signal feedback level :FbL/R

Define. Level attenuation is defined in percentage terms, assuming that a level resolution of about 1% is sufficient. For the definition format, see " ■Definition of coefficient/address symbol ". The definition description on the dAsms source code is as follows. The initial value is an example.

-------------------------------------------------- ---
     EffSendLevelL=%100
     EffSendLevelR=%100
     DrctLevelL=%50
     DrctLevelR=%50
     EffRtnLevelL=%75
     EffRtnLevelR=%75
     FbL=%50
     FbR=%50
-------------------------------------------------- ---

1-2 Definition of coefficients related to feedback filter

As seen in the signal flow diagram, the coefficients of the first-order IIR filter, which is the feedback path of the delayed signal, are:

     C0L/R
     C1L/R
     C2L/R

Define. Assuming that the filter coefficient is given as a value normalized to 1, we will define it in decimal notation. Considering an appropriate cutoff frequency, the definition description on the dAsms source code is as follows.

     C0L=0.40893
     C0R=0.40893
     C1L=0.40893
     C1R=0.40893
     C2L=0.18164
     C2R=0.18164

2. Definition of address constant symbol (#ADRS)

2-1 Definition of write and read addresses to delay ring buffer
In the signal flow diagram, the rectangle in the center of each Lch/Rch section represents the delay. The delay is created by a ring buffer, and the delay time is proportional to the difference between the write address and the read address. One address corresponds to a delay of one sample. As an address constant,

     waL/R
     raL/R

Define. Addresses on the ring buffer can be given as initial values to these address constant symbols as hexadecimal or decimal integers, but in dAsms, addresses can be converted to time (milliseconds). , considering an appropriate delay time, the definition description on the dAsms source code is as follows.

-------------------------------------------------- --------------
     waL=ms0.0
     raL=ms149.9
     waR=ms150.0
     raR=ms249.9
-------------------------------------------------- --------------

3.Description of program part (#PROG)

3-1 Preparation of Lch side data
Looking at the signal flow diagram, you can see that memory access (reading from the ring buffer) is necessary to obtain the data necessary for the operation. The address on the ring buffer to be read is

     raL
     raL+1

is. However, since these addresses are only relative positions on the ring buffer, add the address description element "DEC" to the "..." part of the external memory read parameter "MR[...]". "DEC" represents a counter that is decremented by 1 for each sample, and ring buffer operation is only realized by adding this to the address description element. The data read from positions raL and raL+1 on the ring buffer are respectively

     MEMS00
     MEMS01

The above is expressed in the dAsms source code as shown below.

     LDI MEMS00,MR[raL+DEC]
     LDI MEMS01,MR[raL+DEC+1]

For reference, the addresses on the ring buffer that are accessed by the above two "MR[...]" are kept 1 address apart from each other, and are accessed one address per sample by the action of "DEC". It will shift in the lower direction.

3-2 Calculation of Lch side feedback filter part
Once you have the necessary data ready, next you will write the instructions for performing calculations using that data. The calculation procedure for the first-order IIR filter, which is the feedback path for the delayed signal, is as follows.

  1. Multiply the value loaded into MEMS00 by the coefficient C0L.

  2. Multiply the value loaded into MEMS01 by the coefficient C1L and add it to the result of (1).

  3. Multiply the value of TEMP01 by the coefficient C2L and add it to the result of (2).

  4. Store the result of (3) in TEMP00.

The important thing here is that TEMP is a ring buffer. The subscript xx of TEMPxx represents a relative address as a ring buffer, and the data stored in TEMP00 will appear in TEMP01 in the next sample. In (3) and (4) above, this is used to achieve a delay of one sample.

Due to the characteristics of the SCSP/DSP hardware that dAsms targets, the way to write calculation formulas is somewhat special. The contents of (1) to (4) above are expressed in the dAsms source code as follows.

-------------------------------------------------- ------------------------
     @ TEMP01 * C2L + ( MEMS01 * C1L + ( MEMS00 * C0L + ) )> TEMP00
-------------------------------------------------- ------------------------

Note that in order to write consecutive multiplications and additions like (1) to (3) above, the actual order of each multiplication and the written order must be reversed.

3-3 Writing to Lch side ring buffer
From the signal flow diagram,

  1. The value of input EXTS00 multiplied by the coefficient EffSendLevelL

  2. The value stored in TEMP00 in 3-2 (4) multiplied by the coefficient FbL

You can see that all you need to do is write the sum of these two to the ring buffer. The write address on the ring buffer is waL and uses the address description element "DEC" similar to MR[...] in 3-1. The above content is expressed in the dAsms source code as follows.

-------------------------------------------------- ------------------------
     @TEMP00 * FbL + ( EXTS00 * EffSendLevelL + )> MW[waL+DEC]
-------------------------------------------------- ------------------------

3-4 Generating Lch output data and writing to EFREG
From the signal flow diagram,

  1. Data read from address raL on the ring buffer multiplied by coefficient EffRtnLevelL

  2. The value of input EXTS00 multiplied by the coefficient DrctLevelL

You can see that all you need to do is add up the two and store it in EFREG00. Here, we will use the data (read from the ring buffer) required for the multiplication in (a), which was loaded into MEMS00 in 3-1. The above content is expressed in the dAsms source code as follows.

-------------------------------------------------- ------------------------
     @EXTS00 * DrctLevelL + ( MEMS00 * EffRtnLevelL + )> EFREG00
-------------------------------------------------- ------------------------

This completes the writing of the Lch side source code.

3-5 Writing the Rch side source code
The function of this program example is a stereo (L/R independent) delay, but as you can see from the signal flow diagram, the processing content on the Rch side is the same as that on the Lch side. However, the coefficient/address constant symbol names, register names, etc. used are different. Therefore, if you copy and paste the Lch side source code written up to the previous section and rewrite only the changed parts, it will become the Rch side source code.

3-6 Coding completed
This completes the writing of the source code for this example program. The overall image of the source code according to " 3. Source code structure " is as follows.

-------------------------------------------------- ------------------------
     'dAsms sample program.
     'Function:L/R independent delay
     'CD Lch Direct + Delayed -> EFREG00
     'CD Rch Direct + Delayed -> EFREG01
     #COEF

     'Levels
     EffSendLevelL=%100
     EffSendLevelR=%100
     DrctLevelL=%50
     DrctLevelR=%50
     EffRtnLevelL=%75
     EffRtnLevelR=%75
     FbL=%50
     FbR=%50

     'FilterCoefs
     C0L=0.40893
     C0R=0.40893
     C1L=0.40893
     C1R=0.40893
     C2L=0.18164
     C2R=0.18164

     #ADRS
     waL=ms0.0
     raL=ms149.9
     waR=ms150.0
     raR=ms249.9

     #PROG

     'Lch
     LDI MEMS00,MR[raL+DEC]
     LDI MEMS01,MR[raL+DEC+1]
     @ TEMP01 * C2L + ( MEMS01 * C1L + ( MEMS00 * C0L + ) )> TEMP00
     @ TEMP00 * FbL + ( EXTS00 * EffSendLevelL + )> MW[waL+DEC]
     @EXTS00 * DrctLevelL + ( MEMS00 * EffRtnLevelL + )> EFREG00

'Rch LDI MEMS02,MR[raR+DEC] LDI MEMS03,MR[raR+DEC+1] @ TEMP03 * C2R + ( MEMS03 * C1R + ( MEMS02 * C0R + ) )> TEMP02 @TEMP02 * FbR + ( EXTS01 * EffSendLevelR + )> MW[waR+DEC] @EXTS01 * DrctLevelR + ( MEMS02 * EffRtnLevelR + )> EFREG01 #END -------------------------------------------------- ------------------------


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SOUND ManualSCSP/DSP Assembler User's Manual
Copyright SEGA ENTERPRISES, LTD., 1997