<25/29>SCSP User's Manual/4.2.11 Timer

▲ Back ｜ Forward ▼

SCSP User's Manual/4.2 Sound source register

■Timer register

SCSP has a total of three 8-bit up-count timers with a prescaler, timers A, B, and C. The prescaler execution time can be set for each timer using "TACTL", "TBCTL", and "TCCTL".

TACTL[2:0](W) ; Timer-A ConTroL

Specify the increment period of timer A.

Table 4.26 Increment period of timer A

TACTL	Increment period
0	Once per sample
1	Once every 2 samples
2	Once every 4 samples
3	Once every 8 samples
4	Once every 16 samples
5	Once every 32 samples
6	Once every 64 samples
7	Once every 128 samples

TBCTL[2:0](W) ; Timer-B ConTroL

Specify the increment period of timer B.

Table 4.27 Increment period of timer B

TBCTL	Increment period
0	Once per sample
1	Once every 2 samples
2	Once every 4 samples
3	Once every 8 samples
4	Once every 16 samples
5	Once every 32 samples
6	Once every 64 samples
7	Once every 128 samples

TCCTL[2:0](W) ; Timer-C ConTroL

Specify the increment period of timer C.

Table 4.28 Increment period of timer C

TCCTL	Increment period
0	Once per sample
1	Once every 2 samples
2	Once every 4 samples
3	Once every 8 samples
4	Once every 16 samples
5	Once every 32 samples
6	Once every 64 samples
7	Once every 128 samples

Table 4.29 shows the count period for the setting values of "TACTL", "TBCTL", and "TCCTL", and Table 4.30 shows the shortest interrupt time ("TIMA"="TIMB"="TIMC"="FEH") and the longest interrupt time ( "TIMA"="TIMB"="TIMC"="00H").

Table 4.29 Count period for TACTL, TBCTL, TCCTL setting values

TACTL,TBCTL,TCCTL setting value	Count period (compared to 1Fs=1/44.1K)	Actual count cycle time [μsec]
0H	Fs	22.6757
1H	Fs/2	45.3515
2H	Fs/4	90.7029
3H	Fs/8	181.4059
4H	Fs/16	362.8118
5H	Fs/32	725.6236
6H	Fs/64	1451.2472
7H	Fs/128	2902.4943

Table 4.30 Shortest interrupt time and longest interrupt time

TACTL,TBCTL,TCCTL setting value	Shortest interrupt time [μsec]	Maximum interrupt time [msec]
0H	22.6757	5.8050
1H	45.3515	11.6100
2H	90.7029	23.2200
3H	181.4059	46.4399
4H	362.8118	92.8798
5H	725.6236	185.7596
6H	1451.2472	371.5193
7H	2902.4943	743.0385

Also, based on Tables 4.29 and 4.30, the interrupt time can be calculated using the following formula.


Interrupt time = {225 (FFH) - TIMA (B, C) setting value} x count cycle time

The timer starts counting immediately after transferring the setting value to "TIMA", "TIMB", and "TIMC". When this count value reaches FFH, an interrupt will be generated by a timer that is enabled for interrupts (when not using the timer, disable interrupts).

TIMA[7:0](W) ; TIMer-A count data

This is timer A. This timer is an UP counter and generates an interrupt request when all bits become "1B".

TIMB[7:0](W) ; TIMer-B count data

This is timer B. This timer is an UP counter and generates an interrupt request when all bits become "1B".

TIMC[7:0](W) ; TIMer-C count data

This is timer C. This timer is an UP counter and generates an interrupt request when all bits become "1B".

▲ Back ｜ Forward ▼

★ HARDWARE Manual ★ SCSP User's Manual