The SCSP's built-in DMA can only perform transfers between the SCSP's built-in control registers and sound memory. Therefore, the longest continuous transfer byte count is 3812 bytes (EE4H) (memory space from 100000H to 100EE3H is allocated to internal registers). Additionally, the DMA-related registers explained below are prohibited from being changed by DMA transfer. During DMA transfer, addresses always change in an increasing direction. The following are precautions to be taken when performing DMA transfer.
Notes
While DMA is running, the operating speed of the main CPU and sound CPU may slow down.
Accessing the control registers of the DMA controller through DMA transfer is absolutely prohibited. We cannot guarantee the operation of this transfer at all.
DMA transfer is a word (16bit) transfer.
DGATE(R/W) ; Dma GATE (and "0")
The block diagram of the DMA controller is shown in Figure 4.59. Initializes the SCSP built-in control register or any area in the sound memory to "0". When this bit is "1B", execute "0" clear (to actually start, "DEXE" must be executed).
Erasing transfers (writing "0") using DGATE does not affect the data at the transfer source. Also, no data will be lost.
Figure 4.59 DMA controller block diagram
DDIR(R/W) ; Dma (transferring) DIRection
Specifies the direction of DMA transfer. When this bit is "0B", it specifies the transfer from the sound memory to the LSI internal register, and when it is "1B", it specifies the reverse.
Table 4.32 DMA transfer direction
DDIR
Transfer direction
0
Transfer from sound memory to LSI internal register
1
Transfer from LSI internal register to sound memory
DEXE(R/W) ; Dma EXEcution
Instructs to start DMA transfer. DMA transfer starts when this bit is "1B". Writing "0B" is invalid. Also, when the DMA transfer is completed, it automatically becomes "0B".
Table 4.33 DMA transfer
DEXE
Transfer status
0
Invalid or transfer ended
1
DMA transfer start
DMEA[19:1](W) ; Dma MEmory start Address
Specifies the sound memory address (in word units) at which to start DMA transfer.
DRGA[11:1](W) ; Dma ReGister start Address
Specify the address (in word units) of the LSI internal register to start DMA transfer.
DTLG[11:1](W) ; Dma (Transferring) LenGth
Specify the number of transfer words for DMA transfer. At this time, care must be taken to ensure that the transfer source and transfer destination areas do not exceed the sound memory area or LSI internal register area.
