<17/54>VDP1 User's Manual/4.6 Transfer End Status Register

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VDP1 User's Manual/Chapter 4 System Registers

■4.6 Transfer end status register

The end status register (EDSR) indicates the end status of the previous frame processing. This is a read-only 16-bit register located at address 100010H. Set unused bits to 0.

EDSR 100010H (R) bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CEF BEF

End-bit fetch status in the current frame: current end-bit fetch status(CEF), bit1

EDSR 100010H (R)	bit15	bit14	bit13	bit12	bit11	bit10	bit9	bit8	bit7	bit6	bit5	bit4	bit3	bit2	bit1	bit0
0	0	0	0	0	0	0	0	0	0	0	0	0	0	CEF	BEF

Indicates whether the end bit (draw end command) was fetched from the command table in the currently drawing frame. A value of 0 indicates that the end bit has not been fetched, and a value of 1 indicates that the end bit has been fetched and drawing has finished.

CEF	End bit fetch state
0	End bit not fetched in current frame
1	Fetch end bit in current frame, end drawing

VDP1 sequentially fetches command tables on VRAM and draws them to the frame buffer. When the drawing end command (end bit is 1) is fetched, the drawing process for one frame is finished. At this time, CEF is set to 1. When data is transferred from the CPU to VRAM when drawing has finished (CEF=1), the CPU can access VRAM without having to wait without the overhead of stopping drawing. Fetching the drawing end command, VDP1 sets CEF to 1 and generates an interrupt signal. There are two ways to determine when drawing has finished: checking the fetch status of the end bit each time using CEF (polling), and using this interrupt signal. If there is no drawing end command in VRAM, or if it is defined so that it cannot be fetched in jump format, this bit remains 0. This bit is initialized to 0 when switching frame buffers or starting drawing. If the drawing end command fetch matches when switching frame buffers, CEF and BEF may not become 1.

End-bit fetch status in previous frame: before end-bit fetch status(BEF), bit 0

Indicates whether the end bit (draw end command) was fetched from the command table in the previous frame. A value of 0 indicates that the end bit has not been fetched, and a value of 1 indicates that the end bit has been fetched and drawing has finished.

BEF	End bit fetch state
0	End bit not fetched in previous frame
1	Fetch end bit in previous frame, end drawing

VDP1 sequentially fetches command tables on VRAM and draws them to the frame buffer. When the drawing end command (end bit is 1) is fetched, the drawing process for one frame is finished. If there are many commands or many pixels are drawn for enlargement, drawing may not be completed within one frame, and this is called "transfer overflow." This bit represents a transfer over condition. If the transfer is overloaded, you need to take measures such as reducing the number of drawing commands or drawing pixels. If there is no drawing end command in VRAM, or if it is defined so that it cannot be fetched in jump format, this bit remains 0. The CEF value is written to this bit when switching frame buffers or when drawing starts, and is retained until the next frame buffer switching.

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