The Last operation command address register (LOPR) represents the last processed command table address of the previous frame. This is a 16-bit read-only register located at address 100012H.
LOPR 100012H (R)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Processing interruption table address/8H
0
0
Processing interruption table address: bit15~0
When switching frame buffers, the value obtained by dividing the address of the command table that was importing parameters from VRAM to VDP1 by 8H is written to this register.
This register is updated when switching frame buffers, so you can know the final processing command table address of the previous frame.
Since the command table address boundary is 20HByte, the lower 2 bits of the register are fixed to 00B.
Figure 4.3 Processing interruption and current processing table address
