VDP2 has two VRAMs connected to it for defining pattern name tables, character pattern data, etc. It also has a 32K bit built-in color RAM for defining color data. It also manages internal registers. Figure 1.2 shows the address map of VRAM, color RAM, and registers managed by VDP2.
Stores image data for the scroll screen and data tables required for each function.
Read accesses by VDP2 always take priority over read/write accesses by the CPU or DMA controller. Therefore, depending on the timing of the access, a wait cycle may occur in the CPU or DMA controller.
Access by the CPU or DMA controller can be byte, word, or longword. However, read access using SCU-DMA must not be performed.
●Color RAM
Stores color data for sprites and scroll screens.
Also, define an enable bit for the color calculation function in the most significant bit if necessary.
Read/write access from the CPU or DMA controller is always possible, but depending on the timing of the access, the image may be distorted.
Access by the CPU or DMA controller is only possible in word or longword units. Access in bytes is not possible.
●Register
Configure each function of VDP2.
After power-on or reset, the values in most registers are cleared to 0, so be sure to set the values.
Read/write access from the CPU or DMA controller is always possible, but depending on the timing of the access, the image may be distorted.
Access by the CPU or DMA controller is only possible in word or longword units. Access in bytes is not possible.