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★ HARDWARE Manual ★ VDP2 User's Manual ★ Chapter 4 Scroll screen
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VDP2 User's Manual/Chapter 4 Scroll screen
●Normal scroll screen map register
- The normal scroll screen map register specifies the start address of the pattern name table for each plane when displaying the normal scroll screen in cell format.
This is a 16-bit write-only register located at addresses 180040H to 18004EH. The value is cleared to 0 after power-on or reset, so be sure to set it.
- MPABN0 180040H
- MPCDN0 180042H
- MPABN1 180044H
- MPCDN1 180046H
- MPABN2 180048H
- MPCDN2 18004AH
- MPABN3 18004CH
- MPCDN3 18004EH
- Map bit (for normal scrolling) : Map bit
- (N0MPA5~N0MPA0, N0MPB5~N0MPB0, N0MPC5~N0MPC0, N0MPD5~N0MPD0, N1MPA5~N1MPA0, N1MPB5~N1MPB0, N1MPC5~N1MPC0, N1MPD5~N1MPD0, N2MPA5~N2MPA0, N2MPB5~N2MPB0, N2MP C5〜N2MPC0, N2MPD5〜N2MPD0, N3MPA5 〜N3MPA0, N3MPB5〜N3MPB0, N3MPC5〜N3MPC0, N3MPD5〜N3MPD0)
Specify the start address of the pattern name table for each plane when displaying the normal scroll screen in cell format.
N0MPA5~N0MPA0 | 180040H | bits 5-0 | For plane A of NBG0 |
N0MPB5~N0MPB0 | 180040H | bits 13-8 | For plane B of NBG0 |
N0MPC5~N0MPC0 | 180042H | bits 5-0 | For NBG0 plane C |
N0MPD5~N0MPD0 | 180042H | bits 13-8 | For plane D of NBG0 |
N1MPA5~N1MPA0 | 180044H | bits 5-0 | For plane A of NBG1 |
N1MPB5~N1MPB0 | 180044H | bits 13-8 | For plane B of NBG1 |
N1MPC5~N1MPC0 | 180046H | bits 5-0 | For NBG1 plane C |
N1MPD5~N1MPD0 | 180046H | bits 13-8 | For plane D of NBG1 |
N2MPA5~N2MPA0 | 180048H | bits 5-0 | For NBG2 plane A |
N2MPB5~N2MPB0 | 180048H | bits 13-8 | For NBG2 plane B |
N2MPC5~N2MPC0 | 18004AH | bits 5-0 | For NBG2 plane C |
N2MPD5~N2MPD0 | 18004AH | bits 13-8 | For NBG2 plane D |
N3MPA5~N3MPA0 | 18004CH | bits 5-0 | For NBG3 plane A |
N3MPB5~N3MPB0 | 18004CH | bits 13-8 | For NBG3 plane B |
N3MPC5~N3MPC0 | 18004EH | bits 5-0 | For NBG3 plane C |
N3MPD5~N3MPD0 | 18004EH | bits 13-8 | For NBG3 plane D |
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★ HARDWARE Manual VDP2 User's Manual ★ Chapter 4 Scroll screen
Copyright SEGA ENTERPRISES, LTD., 1997