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HARDWARE ManualVDP2 User's ManualChapter 7 Line Screen
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VDP2 User's Manual/Chapter 7 Line Screen

■7.2 Back screen

The back screen (BACK) is a screen that is displayed only when no other screens are displayed, and you can choose to make the entire screen a single color or specify a color for each line. Specify the color data to be used for that line in 5 bits each of RGB.
In non-interlaced and double-dense interlaced modes, you can specify a color for each line, but in single-dense interlaced mode, you can only specify every two lines.
Figure 7.4 shows the configuration of the back screen table for each interlace mode, and Figure 7.5 shows the data configuration on the back screen table.

Figure 7.4 Back screen table configuration

●Non-interlaced and double-dense interlaced modes
 Bit 15 ← Back screen table (VRAM) → 0
+00H 1st line RGB data
+02H 2nd line RGB data
+04H 3rd line RGB data
+06H 4th line RGB data
+08H 5th line RGB data
+0AH 6th line RGB data
:
:
:
:
[note]
In the case of a single color, the RGB data of the first line is used for the entire line color.
For double-dense interlacing, store line color data for even and odd fields together

●Single dense interlace mode
 Bit 15 ← Back screen table (VRAM) → 0
+00H RGB data of 1st and 2nd lines
+02H RGB data for 3rd and 4th lines
+04H RGB data for 5th and 6th lines
+06H RGB data for 7th and 8th lines
+08H RGB data for 9th and 10th lines
+0AH RGB data for 11th and 12th lines
:
:
:
:
[note]
In the case of a single color, the RGB data of the 1st and 2nd lines will be used for the entire line color.

Figure 7.5 Bit configuration of back screen table data

 15
 14
 13
 12
 11
 10
 9
 8
 7
 6
 5
 4
 3
 2
 1
 0
BLUE data 5 bits GREEN data 5 bits RED data 5 bits

part is ignored.
Also, add 0 to the lower 3 bits of each RGB to make it 8 bits.

●Back screen table address register

The back screen table address register specifies the back screen color mode and the start address of the table. This is a 32-bit write-only register located at addresses 1800ACH to 1800AEH. The value is cleared to 0 after power-on or reset, so be sure to set it.

BKTAU 1800AC
   15   
   14   
   13   
   12   
   11   
   10   
   09   
   08   
 BKCLMD
 -
 -
 -
 -
 -
 -
 -

   07   
   06   
   05   
   04   
   03   
   02   
   01   
   00   
 -
 -
 -
 -
 -
 BKTA18
 BKTA17
 BKTA16 

BKTAL 1800AE
   15   
   14   
   13   
   12   
   11   
   10   
   09   
   08   
 BKTA15
 BKTA14
 BKTA13
 BKTA12
 BKTA11
 BKTA10
 BKTA9
 BKTA8

   07   
   06   
   05   
   04   
   03   
   02   
   01   
   00   
 BKTA7
 BKTA6
 BKTA5
 BKTA4
 BKTA3
 BKTA2
 BKTA1
 BKTA0

Back screen color mode bit : BACK color mode bit (BKCLMD), bit 15
Specify the color mode of the back screen.

BKCLMD back screen color
 0
Make it monochrome
 1
Specify for each line

Back screen table address bit : BACK color table address bit (BKTA18 to BKTA0)
Specify the start address of the back screen table on VRAM.

BKTA18~BKTA16 1800ACH bits 2-0
BKTA15~BKTA0 1800AEH bits 15-0

The actual first VRAM address is calculated using the following formula. If the VRAM capacity is 4Mbits, the most significant bit of the address is ignored.


(Back screen table start address)
             = (back screen table address register value 19 bits) x 2H

If the back screen color mode bit is set to "single color", the color data specified by the back screen table address bit will be used for the entire screen.


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HARDWARE ManualVDP2 User's ManualChapter 7 Line Screen
Copyright SEGA ENTERPRISES, LTD., 1997