When accessing an area that can be rewritten by a device other than the CPU, such as an I/O port, an external device's work RAM, or an SCU register, if the cache is hit, a value different from the actual value may be returned. there is. In such cases, you must access the cache-through area.
Figure 1.4 shows the operation when a cache hit occurs, and Figure 1.5 shows the cache-through mapping. Figure 1.4 Explanation of operation at cache hit
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Figure 1.5 SCU mapping (Cache_through_address)
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