The RAM control register specifies the VRAM bank division, the purpose of VRAM usage for the rotating scroll screen, and the color RAM mode. This is a 16-bit readable and writable register located at address 18000EH. The value is cleared to 0 after power-on or reset, so be sure to set it.
Color RAM coefficient table enable bit : Color RAM coefficient table enable bit (CRKTE), bit 15
Specifies whether to store the coefficient table in color RAM.
CRKTE
process
0
Coefficient table is stored in VRAM
1
Coefficient table is stored in color RAM
Color RAM mode bit : Color RAM mode bit (CRMD1, CRMD0), bits 13, 12
Please refer to " 3.4 Color RAM Mode ".
When the CRKTE bit is set to 1, set the color RAM mode to mode 1. At that time, the second half of the color RAM (100800H to 100FFFH) is used for coefficient table data, so color data cannot be stored.
VRAM mode bit : VRAM mode bit (VRAMD, VRBMD), bits 9, 8
Rotation data bank specification bit : Data bank select bit (RDBSA01, RDBSA00, RDBSA11, RDBSA10, RDBSB01, RDBSB00, RDBSB11, RDBSB10), bits 7 to 0
Please refer to " 6.2 Rotational scroll screen display control ".
When the CRKTE bit is set to 1, do not specify that the 4 banks of VRAM be used as RAM for coefficient table data.
