STN-39

Supplement about the number of transferred bytes of SCU-DMA

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Contents

■Operation when the number of DMA transfer bytes is set to '0'

When the number of SCU-DMA transfer bytes is set to '0', the number of transfers will be the maximum value for each setting.

■Supplement about the number of transferred bytes of SCU-DMA

When the number of transfer bytes of SCU-DMA is set to '0', the number of transfers is the maximum for each setting.

＜ Number of table/transfer bytes＞

	direct mode		indirect mode
Transfer level	Register setting value	Number of bytes transferred	Transfer count setting value	Number of bytes transferred
LEVEL 0	00000H 00001H 00002H : FFFFFH	100000H bytes 000001H byte 000002H bytes : 0FFFFFH byte	00000H 00001H 00002H : FFFFFH	100000H bytes 000001H byte 000002H bytes : 0FFFFFH byte
LEVEL 1	000H 001H 002H : FFFH	1000H bytes 0001H Byte 0002H Byte : 0FFFH byte	00000H 00001H 00002H : FFFFFH	100000H bytes 000001H bytes 000002H bytes : 0FFFFFH byte
LEVEL 2	000H 001H 002H : FFFH	1000H bytes 0001H Byte 0002H Byte : 0FFFH byte	00000H 00001H 00002H : FFFFFH	100000H bytes 000001H byte 000002H bytes : 0FFFFFH bytes
DSP	00H 01H 02H : FFH	100H word 001H Word 002H Word : 0FFH word

• Note: The transfer unit of DSP DMA is word unit (4 bytes).
• Indirect mode allows DMA transfer of up to 100000H bytes at level 0 to level 2.
• For DSP DMA, setting '0' will maximize the number of transfers. However, with DMA that targets internal RAM, each RAM has only 40H words, so if you specify a larger number of transfer bytes, the same address will be repeatedly overwritten.
  (The DSP's DMA does not move the access to another address, but the CPU's read/write moves the access to another RAM.)

■Transfer example

In case of DMA settings: transfer source = address 6001000H, transfer destination = address 00H of RAM0, number of transfer bytes = 00H.

Address 6001000H → Address 00H of RAM0 (1st word data)
Address 6001004H → Address 01H of RAM0 (2nd word data)
Address 6001008H → Address 02H of RAM0 (3rd word data)
: :
60010FCH address → 3FH address of RAM0 (64th word data)
Address 6001100H → Address 00H of RAM0 (65th word data) ← 1st word will be overwritten
Address 6001104H → Address 01H of RAM0 (66th word data)
: :
Address 60013FAH → Address 3EH of RAM0 (255th word data)
60013FCH address → 3FH address of RAM0 (256th word data) Maximum number of transfers

■Reference

"HARDWARE MANUAL/SCU User's Manual"
CPU-DMA direct mode ●Number of transferred bytes