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★ HARDWARE Manual ★ SCU User's Manual ★ 3.1 Register List
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SCU User's Manual/Chapter 3 Register Details

■3.3 DSP control port

◆DSP program control port

Figure 3.14 shows details of the DSP program control port.

Figure 3.14 DSP program control port (register: PPAF) Initial value 00000000H
bit 
31
  
  
  
  
  
  
24
 
23
  
  
  
  
  
  
16
 
15
  
  
  
  
  
  
8 
7 
  
  
  
  
  
  
0
25FE0080 − − − − − １ ２ − ３ ４ ５ ６ ７ ８ ９ 10 11 − − − − − − − 12 13 14 15 16 17 18 19

Pause release flag (1 [bit 26] in Figure 3.14)
PR(W) execute Pause Reset flag
When the program execution control flag (see below) is 1, writing 1 to this flag will cause the paused program to release the pause and start running. If the program is not paused or the program execution flag is 0, the status will not change.

Pause flag (2 [bit 25] in Figure 3.14)
EP(W) Execute Pause flag
When the program execution control flag (see below) is 1, writing 1 to this flag will pause the running program. If the program is paused or the program execution flag is 0, the status will not change.

D0-Bus DMA execution flag (3 [bit 23] in Figure 3.14)
T0(R) Transfer 0
This flag is 1 when performing DMA using D0-Bus.

Sign flag (4 [bit 22] in Figure 3.14)
S(R) Sign flag
This flag becomes 1 when the operation result is negative.

Zero flag (5 [bit 21] in Figure 3.14)
Z(R) Zero flag
When the operation result is 0, this flag becomes 1.

Carry flag (6 [bit 20] in Figure 3.14)
C(R) Curry flag
This flag becomes 1 when a carry occurs in the operation result.

Overflow flag (7 [bit 19] in Figure 3.14)
V(R) oVerflow flag
This flag becomes 1 when the calculation result overflows (or underflows). This flag is also reset by reading.

Program end interrupt flag (8 [bit 18] in Figure 3.14)
E(R) End flag
When the end of the program is detected by the ENDI instruction, this flag becomes 1 and a program end interrupt is generated. This flag is also reset by reading.

Step execution control bit (9 [bit 17] in Figure 3.14)
ES(W) Execute Step control bit
If you write 1 while the program is stopped (when the program execution control flag is 0), the program will execute one step. It is disabled during execution.

Program execution control flag (10 [bit 16] in Figure 3.14)
EX(R/W) program EXecute control flag
Controls program execution. Writing 1 starts execution, writing 0 stops execution. Also, by reading this flag, you can determine whether the program is running (1) or stopped (0).

Program counter transfer permission bit (11 [bit 15] in Figure 3.14)
LE(W) Load Enable bit
This bit determines whether the program RAM address (see below) is loaded into the program counter. Writing 1 to this bit loads the current program RAM address into the program counter. It cannot be loaded while the program is running (when the program execution control flag is 1).

Program RAM address (12 to 19 [bits 7 to 0] in Figure 3.14)
P7-0(R/W) Program RAM address bit7-0
Stores the program RAM address. You can set the start address and read the stop address.

 Note
 When reading the DSP program control port,
Please be aware that the following phenomena may occur.

  1. The V flag (overflow flag) will be cleared.

    2. The V flag cannot be checked during DSP execution.

  2. The DSP end interrupt factor may not occur.

    3. If you monitor (read) the program end interrupt flag during DSP execution, the DSP end interrupt may not occur, so if your program uses an interrupt to determine the end of DSP, do not read this address.

◆DSP program RAM data port

Figure 3.15 details the DSP program RAM data port. By writing data to be stored in the program RAM area from the CPU, that data is loaded into the program RAM. After loading, the program RAM address of the program control port is incremented by 1. However, writing is prohibited while the program is running (when the program execution control flag is 1). This port is for writing only.

Figure 3.15 DSP program RAM data port (register: PPD) Initial value undefined
bit 
31
  
  
  
  
  
  
24
 
23
  
  
  
  
  
  
16
 
15
  
  
  
  
  
  
8 
7 
  
  
  
  
  
  
0
25FE0084 １ ２ ３ ４ ５ ６ ７ ８ ９ 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

◆DSP data RAM address port

Figure 3.16 details the DSP data RAM address port. Set the data RAM address to access. However, writing is prohibited during program execution (when the program execution control flag is 1).

Figure 3.16 DSP data RAM address port (register: PDA) Initial value 00000000H
bit 
31
  
  
  
  
  
  
24
 
23
  
  
  
  
  
  
16
 
15
  
  
  
  
  
  
8 
7 
  
  
  
  
  
  
0
25FE0088 − − − − − − − − − − − − − − − − − − − − − − − − １ ２ ３ ４ ５ ６ ７ ８

Data RAM selection bits (1 to 2 [bits 7 to 6] in Figure 3.16)
RA7-6(W) RAM select bit bit7-6
Represents the page of RAM data to read. Table 3.5 shows RAM page selection.

Table 3.5 RAM page selection 
 bit
 Select RAM page
 RA7
 RA6
 0
 0
 Select RAM0
 0
 1
 Select RAM1
 1
 0
 Select RAM2
 1
 1
 Select RAM3

Data RAM address (3 to 8 [bits 5 to 0] in Figure 3.16)
RA5-0(W) RAM address bit5-0
Specify the data RAM address to read.

◆DSP data RAM data port

Figure 3.17 shows a detailed diagram of the DSP data RAM data port. Access data in data RAM from this port. When accessed, the data RAM address of the DSP data RAM address port is counted up by 1. However, access is prohibited during program execution (when the program execution control flag is 1). This port can read and write.

Figure 3.17 DSP data RAM data port (register: PDD) initial value undefined
bit 
31
  
  
  
  
  
  
24
 
23
  
  
  
  
  
  
16
 
15
  
  
  
  
  
  
8 
7 
  
  
  
  
  
  
0
25FE008C １ ２ ３ ４ ５ ６ ７ ８ ９ 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 

 Note
 Data RAM notes
If you use the pause function (EP) or the one-step execution function (ES) of the program control port of the DSP during DSP execution, the data in the data RAM inside the DSP is not guaranteed, so please strictly observe the following. please.

  1. DSP pause function (EP) and one-step execution function (ES) are prohibited from use in actual applications.
    (These functions are originally for debugging, and they will work if used when debugging the DSP, but the contents of the data RAM inside the DSP are no longer guaranteed.)

  2. To access the DSP data RAM address port and DSP data RAM data port, make sure that the program execution control flag (EX) of the DSP control port and the D0-Bus DMA execution flag (T0) are both "0". Please issue from.

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★ HARDWARE Manual ★ SCU User's Manual ★ 3.1 Register List
Copyright SEGA ENTERPRISES, LTD., 1997