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HARDWARE ManualSCU User's Manual
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SCU User's Manual

Chapter 3 Register details


■3.1 Register list

Table 3.1 shows a list of SCU registers. Below, we will explain the registers in detail, dividing them into sections by register generic name.

Table 3.1 Register list
Register generic name
 Register name
 Start address
 final address
 size
 DMA control register
 Level 0 - DMA set register
 25FE0000H
 25FE0017H
 24 bytes
 Level 1 - DMA set register
 25FE0020H
 25FE0037H
 24 bytes
 Level 2 - DMA set register
 25FE0040H
 25FE0057H
 24 bytes
 DSP control port
 DSP program control port
 25FE0080H
 25FE0083H
 4 byte
 DSP program RAM data port
 25FE0084H
 25FE0087H
 4 byte
 DSP data RAM address port
 25FE0088H
 25FE008BH
 4 byte
 DSP data RAM data port
 25FE008CH
 25FE008FH
 4 byte
 timer register
 Timer 0 compare register
 25FE0090H
 25FE0093H
 4 byte
 Timer 1 set data register
 25FE0094H
 25FE0097H
 4 byte
 Timer 1 mode register
 25FE0098H
 25FE009BH
 4 byte
 Interrupt control register
 interrupt mask register
 25FE00A0H
 25FE00A3H
 4 byte
 Interrupt status register
 25FE00A4H
 25FE00A7H
 4 byte
 A-Bus control register
 A-Bus interrupt acknowledge
 25FE00A8H
 25FE00ABH
 4 byte
 A-Bus configuration register
 25FE00B0H
 25FE00B7H
 8 bytes
 A-Bus refresh register
 25FE00B8H
 25FE00BBH
 4 byte
 SCU control register
 SCU SDRAM selection register
 25FE00C4H
 25FE00C7H
 4 byte
 SCU version register
 25FE00C8H
 25FE00CBH
 4 byte

Always use the cache-through address to access the SCU registers.


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HARDWARE ManualSCU User's Manual
Copyright SEGA ENTERPRISES, LTD., 1997